A formal methodology for automated synthesis of VLSI systems /

में बचाया:
ग्रंथसूची विवरण
OCLC:17797746
मुख्य लेखक: Peng, Zebo
निगमित लेखक: Universitetet i Linköping
भाषा:English
प्रकाशित: Linköping, Sweden : Dept. of Computer and Information Science, Linköping University, 1987.
श्रृंखला:Linköping studies in science and technology. Dissertations ; no. 170.
विषय:
Integrated circuits > Very large scale integration > Design and construction.
Computer-aided design.
स्वरूप:

थीसिस Monograph

Note that CRL will digitize material from the collection when copyright allows.

विवरण
भौतिक वर्णन:xi, 181 p. : ill. ; 24 cm.
ग्रन्थसूची:Bibliography: p. [173]-181.
आईएसबीएन:9178702259
9789178702251
प्रकाशन का स्थान:Sweden.

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