An array processor design methodology for hard real-time systems /

Sparad:
Bibliografiska uppgifter
OCLC:65631717
Huvudupphovsman: Jayasinghe, Jayasinghe Arachchige Kapila Sriyantha, 1960-
Institutionell upphovsman: Universiteit Twente
Språk:English
Publicerad: [S.l. : s.n., 1991]
Ämnen:
Materialtyp:

Lärdomsprov Monograph

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