A formal methodology for automated synthesis of VLSI systems /
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| OCLC: | 17797746 |
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| Glavni autor: | |
| Autor kompanije: | |
| Jezik: | English |
| Izdano: |
Linköping, Sweden :
Dept. of Computer and Information Science, Linköping University,
1987.
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| Serija: | Linköping studies in science and technology. Dissertations ;
no. 170. |
| Teme: | |
| Format: | Disertacija Monograph Note that CRL will digitize material from the collection when copyright allows. |
| Opis: | xi, 181 p. : ill. ; 24 cm. |
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| Bibliografija: | Bibliography: p. [173]-181. |
| ISBN: | 9178702259 9789178702251 |
| Mjesto izdanja: | Sweden. |