APA-viite (7. p.)

Jayasinghe, J. A. K. S. (1991). An array processor design methodology for hard real-time systems. s.n..

Chicago-viite (17. p.)

Jayasinghe, Jayasinghe Arachchige Kapila Sriyantha. An Array Processor Design Methodology for Hard Real-time Systems. [S.l.: s.n., 1991.

MLA-viite (8. p.)

Jayasinghe, Jayasinghe Arachchige Kapila Sriyantha. An Array Processor Design Methodology for Hard Real-time Systems. s.n., 1991.