Buchanan, I. (1980). Modelling and verification in structured integrated circuit design.
Chicago-referens (17:e uppl.)Buchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.
MLA-referens (8:e uppl.)Buchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.
Varning: dessa hänvisningar är inte alltid fullständigt riktiga.