APA ציטוט

Buchanan, I. (1980). Modelling and verification in structured integrated circuit design.

Chicago Style (17th ed.) Citation

Buchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.

ציטוט MLA

Buchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.