Cita APA

Buchanan, I. (1980). Modelling and verification in structured integrated circuit design.

Citación estilo Chicago

Buchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.

Cita MLA

Buchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.

Warning: These citations may not always be 100% accurate.