Buchanan, I. (1980). Modelling and verification in structured integrated circuit design.
Chicago Style (17th ed.) CitationBuchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.
MLA (8th ed.) CitationBuchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.
Warning: These citations may not always be 100% accurate.