Cita APA

Buchanan, I. (1980). Modelling and verification in structured integrated circuit design.

Chicago Style (17th ed.) Citation

Buchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.

Cita MLA

Buchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.

Atenció: Aquestes cites poden no estar 100% correctes.