Buchanan, I. (1980). Modelling and verification in structured integrated circuit design.
Chicago Style (17th ed.) CitationBuchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.
MLA引文Buchanan, Irene. Modelling and Verification in Structured Integrated Circuit Design. 1980.
警告:这些引文格式不一定是100%准确.